Chip-scale packaged led device

ABSTRACT

An LED device includes a substrate, a number (N) of flip-chip LED die(s), an electrical conductive structure and a lens structure. The substrate has upper and lower surfaces and is formed with multiple through holes. A ratio of LED die(s) surface area to an area of the upper surface of the substrate ranges from 22.7% to 76.2%. The electrical conductive structure includes a number (N) of upper bonding pad assembly (assemblies), a number (N+1) of lower bonding pads and a number (2N) of interconnectors. Each upper bonding pad assembly includes two upper bonding pads electrically connected to the LED die(s). The interconnectors are disposed in the through holes and interconnect the upper and lower bonding pads. The lens structure covers the LED die(s).

CROSS-REFERENCE TO RELATED APPLICATION

This application claims priorities of Chinese Patent Application No.201410166461.6, filed on Apr. 23, 2014 and Chinese Patent ApplicationNo. 201410725064.8, filed on Dec. 3, 2014.

FIELD

The disclosure relates to an LED device, more particularly to achip-scale packaged LED device.

BACKGROUND

LED packaging technique is one of the focuses in the development of thesemiconductor industry. Packaging technique for lateral LEDs andvertical LEDs by wire bonding, and packaging technique for flip-chipLEDs by flip-chip bonding are all being studied for improving brightnessand reliability as well as reducing overall volume of the packaged LEDs.

In terms of packaging technique by flip-chip bonding, chip-scalepackaged LED device has been developed for the purpose ofminiaturization. However, there is still room for improvement regardingbrightness, volume, reliability, yield, etc.

SUMMARY

Therefore, an object of the disclosure is to provide a chip-scalepackaged LED device that is miniaturized and easy to manufacture. Thechip-scale packaged LED device emits light with high brightness and hasdesirable reliability.

The effects of the present disclosure resides in the miniaturization,high emission brightness and desirable reliability of the chip-scalepackaged LED device by virtue of structural designs of a substrate,flip-chip LED die(s), upper bonding pads, lower bonding pads,interconnectors, a lens structure, a reflection layer and an insulationlayer of the chip-scale packaged LED device.

BRIEF DESCRIPTION OF THE DRAWINGS

Other features and advantages of the present disclosure will becomeapparent in the following detailed description of the embodiments withreference to the accompanying drawings, of which:

FIG. 1 is a perspective view of a first implementation of a firstembodiment of a chip-scale packaged LED device according to the presentdisclosure;

FIG. 2 is an exploded perspective view of the first implementation ofthe first embodiment;

FIG. 3 is a cross-sectional view of the first implementation of thefirst embodiment taken along line III-III of FIG. 1;

FIG. 4 is a first variation of the first implementation of the firstembodiment;

FIG. 5 is a top view of the first implementation of the firstembodiment, but without a lens structure;

FIG. 6 is a bottom view of the first implementation of the firstembodiment;

FIG. 7 is a top view of a second implementation of the first embodiment,but without a lens structure;

FIG. 8 is a bottom view of the second implementation of the firstembodiment;

FIG. 9 is a top view of a third implementation of the first embodiment,but without a lens structure;

FIG. 10 is a bottom view of the third implementation of the firstembodiment;

FIG. 11 is a top view of a fourth implementation of the firstembodiment, but without a lens structure;

FIG. 12 is a bottom view of the fourth implementation of the firstembodiment;

FIG. 13 is a top view of the first implementation of the firstembodiment;

FIG. 14 is a side view of the first implementation of the firstembodiment;

FIG. 15 is a top view of a second variation of the first implementationof the first embodiment;

FIG. 16 is a diagram showing relations of light extraction efficienciesof the chip-scale packaged LED devices versus height-to-radius ratios oflens bodies when flip-chip LED dies of various dimensions are used;

FIG. 17 is a diagram showing the differences of the opticalcharacteristics of the chip-scale packaged LED device when flip-chip LEDdies of various dimensions are used;

FIG. 18 is a diagram showing relations between included anglesassociated with side surface cuts of lens body and light extractionefficiency of the chip-scale packaged LED device;

FIG. 19 is a diagram showing relations among thickness of base membersand light extraction efficiency and view angles of the chip-scalepackaged LED device;

FIG. 20 is a perspective view of a third variation of the firstimplementation of the first embodiment;

FIG. 21 is a perspective view of a second embodiment of the chip-scalepackaged LED device according to the present disclosure;

FIG. 22 is a top view of the second embodiment, but without a lensstructure;

FIG. 23 is a bottom view of the second embodiment;

FIG. 24 is a perspective view of a variation of the second embodiment;

FIG. 25 is a perspective view of a third embodiment of the chip-scalepackaged LED device according to the present disclosure;

FIG. 26 is an exploded perspective view of the third embodiment;

FIG. 27 is a perspective view of a variation of the third embodiment;

FIG. 28 is a perspective view of a fourth embodiment of the chip-scalepackaged LED device according to the present disclosure;

FIG. 29 is an exploded perspective view of the fourth embodiment; and

FIG. 30 is a perspective view of a variation of the fourth embodiment.

DETAILED DESCRIPTION

Before the disclosure is described in greater detail with reference tothe accompanying embodiments, implementations and variations, it shouldbe noted herein that like elements are denoted by the same referencenumerals throughout the disclosure.

Bottom views as described hereinafter are essentially top views of thesame device when flipped upside down. In short, the device shown in FIG.6 is the same as that shown in FIG. 5 but flipped upside down, thedevice shown in FIG. 8 is the same as that shown in FIG. 7 but flippedupside down, the device shown in FIG. 10 is the same as that shown inFIG. 9 but flipped upside down, the device shown in FIG. 12 is the sameas that shown in FIG. 11 but flipped upside down, and the device shownin FIG. 23 is the same as that shown in FIG. 22 but flipped upside down.

First Embodiment

FIGS. 1, 2 and 3 illustrate a first implementation of a first embodimentof an LED device 1 according to the present disclosure. The LED device 1is packaged by a chip-scale packaging (CSP) technique. Structure andproperties such as light extraction efficiency, reliability and viewangle of the LED device 1 are described hereinafter with reference tothe accompanying drawings.

Generally speaking, the LED device 1 according to the firstimplementation of the first embodiment includes a substrate 2, twoflip-chip LED dies 3, an electrical conductive structure 4, a lensstructure 5, an insulation layer 71 and a reflection layer 72, all ofwhich will be described in detail hereinafter.

Substrate 2

Referring to FIGS. 1, 2 and 3, the substrate 2 is a carrier substratethat is configured into a square board, has an upper surface 21 and alower surface 22 opposite to the upper surface 21, and is formed with aplurality of through holes 23 that are defined between the upper andlower surfaces 21, 22 and that penetrate through the substrate 2. In thefirst implementation of the first embodiment, the substrate 2 is made ofa highly reflective ceramic material for enhancing light brightness andheat dissipation of the LED device 1. However, the material used formaking the substrate 2 is not limited to ceramic material and may bechosen based on actual needs.

FIG. 4 is a first variation of the first implementation of the firstembodiment of the LED device 1. After long-term usage, undesirablesubstances, such as ambient moisture, chemical compounds, etc., tend toleak into the LED device 1 via a juncture between the substrate 2 andthe lens structure 5. This may cause wiring sulfurization of the LEDdevice 1 resulting in degradation of LED light output. The substrate 2may be formed with a groove 212 recessed from the upper surface 21 andsurrounding the flip-chip LED dies 3. In forming the lens structure 5,molten material for the lens structure 5 will flow into the groove 212,followed by solidifying the molten material to form the lens structure 5and therefore obtaining a protrusion of the lens structure 5 into thegroove 212. The protrusion of the lens structure 5 is capable ofresisting the abovementioned undesirable substances from entering theLED device 1 to reach the flip-chip LED dies 3. Reliability of the LEDdevice 1 is therefore improved.

Flip-chip LED Dies 3

Referring to FIGS. 1, 2 and 3, the flip-chip LED dies 3 serve as lightsource of the LED device 1 and are disposed on the upper surface 21 ofthe substrate 2. Each of the flip-chip LED dies 3 includes a positiveelectrode 31 and a negative electrode 32 that are spaced apart from eachother and that face down to be connected to the electrical conductivestructure 4. In the first implementation of the first embodiment, theflip-chip LED dies 3 cooperate with the electrical conductive structure4 to form a series circuit. The flip-chip LED dies 3 include a firstflip-chip LED die 3 a and a second flip-chip LED die 3 b that haveidentical electrode configurations to be disposed on the substrate 2.That is to say, the positive electrodes 31 of the first and secondflip-chip LED dies 3 a, 3 b are positioned to be adjacent to each other,and the negative electrodes 32 of the flip-chip LED dies 3 a, 3 b arepositioned to be adjacent to each other. In a conventional LED device,flip-chip LED dies of the conventional LED device are arranged in amanner that a positive electrode of each of the flip-chip LED dies isadjacent to a negative electrode with the other one of the flip-chip LEDdies. Therefore, chip rotation is required when mounting the flip-chipLED dies onto a substrate. In contrast, chip rotation is not requiredfor the flip-chip LED dies 3 a in this disclosure, 3 b. The overallprocess flow is therefore simplified.

On the other hand, in order to achieve miniaturization of the LED device1 packaged by a chip-scale packaging (CSP) technique, surface dimensionsof the substrate 2 should be as close to overall surface dimensions ofthe flip-chip LED dies 3 as possible, that is, an area of the uppersurface 21 of the substrate 2 is only slightly greater than an overallsurface area of the flip-chip LED dies 3. In the first implementation ofthe first embodiment of the LED device 1, a ratio of the overall surfacearea of the flip-chip LED dies 3 to the area of the upper surface 21 ofthe substrate 2 ranges from 22.7% to 76.2% to strike a balance amongminiaturization, performance and process yield.

View angle of the flip-chip LED dies 3 would be affected by dimensionsthereof. An LED device with a large view angle would have a ratherdispersed light emission, while an LED device with a small view anglewould have a rather concentrated light emission. Therefore, comparedwith the LED with small view angle, light emitted by the LED with largeview angle tends to be shaded by surrounding components. Table 1 belowshows relations between view angles and spacing between the flip-chipLED dies 3. For the view angle ranging from 110 degrees to 150 degrees,the spacing D (see FIG. 3) ranges from 0.19 mm to 0.5 mm. To be morespecific, the spacing between adjacent flip-chip LED dies 3 is not lessthan 0.19 mm to prevent light absorption attributed to adjacent LED diesand therefore improve overall brightness of light emitted by the LEDdevice 1.

TABLE 1 View angle (degree) 150 143 135 130 125 120 115 110 Spacing D0.5 0.4 0.32 0.29 0.26 0.23 0.21 0.19 (mm)

Electrical Conductive Structure 4

FIGS. 2, 3, 5 and 6 illustrate the electrical conductive structure 4 ofthe first implementation of the first embodiment of the LED device 1.The electrical conductive structure 4 is designed for electricalinterconnection between the flip-chip LED dies 3, and includes two upperbonding pad assemblies 41, three lower bonding pads 42 and fourinterconnectors 43. FIG. 5 is a top view showing interconnectionrelations among the flip-chip LED dies 3, the upper bonding padassemblies 41 and the interconnectors 43. FIG. 6 is a bottom viewshowing interconnection relations among the lower bonding pads 42 andthe interconnectors 43.

The upper bonding pad assemblies 41 are spaced apart from each other andare disposed on the upper surface 21 of the substrate 2. Each of theupper bonding pad assemblies 41 includes two upper bonding pads 411 soas to permit a corresponding one of the flip-chip LED dies 3 to bedisposed thereon. Each of the upper bonding pads 411 is configured intoa rectangular layer. The upper bonding pads 411 of the upper bonding padassemblies 41 are arranged in a 2×2 matrix and the upper bonding pads411 of each upper bonding pad assembly 41 are respectively andelectrically connected to the positive and negative electrodes 31, 32 ofthe corresponding one of the flip-chip LED dies 3.

The lower bonding pads 42 are spaced apart from one another, aredisposed on the lower surface 22 of the substrate 2, and include a firstlower bonding pad 42 a and two second lower bonding pads 42 b. Each ofthe first lower bonding pad 42 a and the two second lower bonding pads42 b is configured into a rectangular layer. In the first implementationof the first embodiment of the LED device 1, the first lower bonding pad42 a and the two second lower bonding pads 42 b are arranged in a rowand the first lower bonding pad 42 a is disposed between the two secondlower bonding pads 42 b.

Each of the interconnectors 43 is disposed in a corresponding one of thethrough holes 23 and electrically interconnects corresponding ones ofthe upper and lower bonding pads 411, 42.

The interconnectors 43 include two first interconnectors 43 a and twosecond interconnectors 43 b. Each of the first interconnectors 43 a hasa top portion that is connected to a corresponding one of the upperbonding pads 411 (i.e., upper right and bottom left ones of the upperbonding pads 411 of FIG. 5). The top portions of the firstinterconnectors 43 a are electrically connected to the negativeelectrode 32 of the first flip-chip LED die 3 a and the positiveelectrode 31 of the second flip-chip LED die 3 b correspondingly(alternatively to the positive electrode 31 of the first flip-chip LEDdie 3 a and the negative electrode 32 of the second flip-chip LED die 3b). Each of the first interconnectors 43 a has a bottom portion that isconnected to the first lower bonding pad 42 a. Therefore, the first andsecond flip-chip LED dies 3 a, 3 b are electrically connected in seriesvia the first interconnectors 43 a and the first lower bonding pad 42 a.On the other hand, each of the second interconnectors 43 b has a topportion that is connected to a corresponding one of the upper bondingpads 411 (i.e., upper left and bottom right ones of the upper bondingpads 411 of FIG. 5). Each of the second interconnectors 43 b has abottom portion that is connected to a corresponding one of the secondlower bonding pads 42 b. To be more specific, the upper left one of theupper bonding pads 411 of FIG. 5 is connected to a lower one of thesecond lower bonding pads 42 b of FIG. 6, and the lower right one of theupper bonding pads 411 of FIG. 5 is connected to an upper one of thesecond lower bonding pads 42 b of FIG. 6. The upper right and lower leftones of the upper bonding pads 411 of FIG. 5 are connected to the firstlower bonding pad 42 a via the first interconnectors 43 a.

By the configuration of the electrical conductive structure 4 asdescribed above, the flip-chip LED dies 3 a, 3 b are electricallyconnected in series. Furthermore, by connecting the second lower bondingpads 42 b to an external circuit (not shown), luminous state of theflip-chip LED dies 3 a, 3 b can be controlled. Besides, with theconfiguration and arrangement of the upper bonding pads 411 and thelower bonding pads 42, area of the substrate 2 could be effectivelyutilized for die bonding process of the flip-chip LED dies 3 a, 3 b andfor applying solder paste to the lower bonding pads 42.

FIGS. 7 and 8 illustrate a second implementation of the first embodimentof the LED device 1 (see FIG. 1) according to the present disclosure,which includes the same numbers of the upper bonding pads 411, the lowerbonding pads 42 and the interconnectors 43 as the numbers of those inthe first implementation of the first embodiment of the LED device 1.The differences between the first and second implementations of thefirst embodiment reside in the configuration and arrangement of thelower bonding pads 42, and the arrangement of the interconnectors 43.

Specifically, in the second implementation of the first embodiment, thefirst lower bonding pad 42 a is configured into a substantiallyrectangular layer formed with two cutout corners that are arrangeddiagonally, and is connected to bottom portions of the firstinterconnectors 43 a. Two of the upper bonding pads 411 (i.e., upperright and bottom left ones of the upper bonding pads 411 of FIG. 7) areelectrically connected to the first lower bonding pad 42 a in series viathe first interconnectors 43 a, and therefore the first and secondflip-chip LED dies 3 a, 3 b are electrically connected in series. Eachof the two second lower bonding pads 42 b is configured into arectangular layer disposed at a corresponding one of the cutout cornersof the first lower bonding pad 42 a, and is connected to the bottomportion of a corresponding one of the second interconnectors 43 b.

That is to say, an upper left one of the upper bonding pads 411 shown inFIG. 7 is electrically connected to a lower left one of the second lowerbonding pads 42 b shown in FIG. 8 via one of the second interconnectors43 b, and a lower right one of the upper bonding pads 411 shown in FIG.7 is electrically connected to a upper right one of the second lowerbonding pads 42 b shown in FIG. 8 via the other one of the secondinterconnectors 43 b. The upper right and lower left ones of the upperbonding pads 411 shown in FIG. 7 are electrically connected to the firstlower bonding pad 42 a shown at the center part of FIG. 8 via the firstinterconnectors 43 a.

The same effect as that of the first implementation of the firstembodiment can be achieved by the second implementation of the firstembodiment with the configuration and arrangement of the upper bondingpads 411, the lower bonding pads 42 and the interconnectors 43 asdescribed above.

FIGS. 9 and 10 illustrate a third implementation of the first embodimentof the LED device 1 (see FIG. 1) according to the present disclosurethat is similar to the first and second implementations. The differencesfrom the previous implementations also reside in the configuration andarrangement of the lower bonding pads 42, and the arrangement of theinterconnectors 43. Specifically, in the third implementation, the firstlower bonding pad 42 a is configured as a rectangular layer having anarea smaller than that of the second lower bonding pad 42 b, and isconnected to bottom portions of the first interconnectors 43 a toachieve electrical connection of the first and second flip-chip LED dies3 a, 3 b in series. Each of the two second lower bonding pads 42 b hasan area larger than that of the first lower bonding pad 42 a and isconfigured as an L-shaped layer. The two second lower bonding pads 42 bare correspondingly connected to the bottom portions of the secondinterconnectors 43 b and cooperate with each other to surround the firstlower bonding pad 42 a. To be more specific, an upper left one of theupper bonding pads 411 shown in FIG. 9 is electrically connected to alower one of the second lower bonding pads 42 b shown in FIG. 10 via oneof the second interconnector 43 b, and a lower right one of the upperbonding pads 411 shown in FIG. 9 is electrically connected to an upperone of the second lower bonding pads 42 b shown in FIG. 10 via the otherone of the second interconnectors 43 b. Upper right and lower left onesof the upper bonding pads 411 shown in FIG. 9 are electrically connectedto the first lower bonding pad 42 a via the first interconnectors 43 a.Based on the above mentioned, the third implementation of the firstembodiment is also capable of achieving the effect as with the first andsecond implementations of the first embodiment.

FIGS. 11 and 12 illustrate a fourth implementation of the firstembodiment of the LED device 1 (see FIG. 1) according to the presentdisclosure that is similar to the first, second and thirdimplementations. The differences from these other implementations alsoreside in the configuration and arrangement of the lower bonding pads42, and the arrangement of the interconnectors 43.

Specifically, in the fourth implementation, the first lower bonding pad42 a is configured into an L-shaped layer with two ends correspondinglyconnected to the bottom ends of the first interconnectors 43 a toachieve electrical connection of the first and second flip-chip LED dies3 a, 3 b in series. Each of the two second lower bonding pads 42 b isconfigured as a rectangular layer and is connected the bottom portion ofa corresponding one of the second interconnectors 43 b. The second lowerbonding pads 42 b are arranged in a row and partially surrounded by thefirst lower bonding pad 42 a. To be more specific, an upper left one ofthe upper bonding pads 411 shown in FIG. 11 is electrically connected toa lower one of the second lower bonding pads 42 b shown in FIG. 12 viaone of the second interconnectors 43 b, and a lower right one of theupper bonding pads 411 shown in FIG. 11 is electrically connected to anupper one of the second lower bonding pads 42 b shown in FIG. 12 via theother one of the second interconnectors 43 b. Upper right and lower leftones of the upper bonding pads 411 shown in FIG. 11 are electricallyconnected to the L-shaped first lower bonding pad 42 a shown in FIG. 12via the first interconnectors 43 b. Based on the above mentioned, thefourth implementation of the first embodiment is also capable ofachieving the effect as with the first, second and third implementationsof the first embodiment.

Insulation Layer 71

Referring to FIGS. 1, 2 and 3, the insulation layer 71 is disposed onthe upper surface 21 of the substrate 2 and is formed with four openings711, each of which has a shape identical to that of a corresponding oneof the upper bonding pads 411. Therefore, the insulation layer 71 iscapable of being disposed between the upper bonding pads 411 to be flushwith the upper bonding pads 411 for electrical insulation among theupper bonding pads 411. However, the insulation layer 71 may be omittedin other variations of the first implementation of the first embodimentand should not be limited by the description disclosed herein.

Reflection Layer 72

Referring to FIGS. 1, 2 and 3, the reflection layer 72 is provided on atleast one of the insulation layer 71 and the upper bonding pads 411 andis formed with at least one opening 722 for receiving the flip-chip LEDdies 3. It is worth noting that, in a variation of the firstimplementation of the first embodiment, the reflection layer 72 may beformed with two openings for respectively receiving the flip-chip LEDdies 3. However, the reflection layer 72 may be omitted in othervariations of the first implementation of the first embodiment andshould not be limited by the description disclosed herein. Thereflection layer 72 is capable of alleviating light absorption caused bythe substrate 2 or the insulation layer 71, and brightness of lightemitted by the LED device 1 is therefore increased.

Lens Structure 5

Referring to FIGS. 1, 2, 3, 13 and 14, the lens structure 5 is acritical optical structure in terms of light emission of the LED device1, and includes a base member 51 and a lens body 52.

The base member 51 is disposed on the upper surface 21 of the substrate2 and is configured into a light-transmissible square layer having anarea the same as that of the substrate 2.

The lens body 52 is disposed on the base member 51 and is configured ina dome shape with a plurality of side surface cuts 521 to be afirst-order optical lens for the light emitted by the flip-chip LED dies3.

The LED device 1 may further include a phosphor material 53 that ismixed with an encapsulating material to form the lens structure 5.Alternatively, the phosphor material 53 is disposed on the upper surface21 of the substrate 2, covers the flip-chip LED dies 3, and issurrounded by the base member 51 of the lens structure 5. The phosphormaterial 53 is capable of being excited by light emitted by theflip-chip LED dies 3 and emits light with a particular wavelength, andthus attributes to adjusting a wavelength of the light emitted by theLED device 1. For example, if the LED device 1 is to be used as awhite-light light source, blue-light flip-chip LED dies 3 and yellowphosphor material 53 may be used. Configurations and types of theflip-chip LED dies 3 and the phosphor material 53 may be changedaccording to practical applications and should not be limited by thedescription disclosed herein.

In order to elaborate upon the description associated with influence ofthe dimensions and structure of the lens structure 5 on the opticalproperties of the LED device 1, the lens body 52 is defined to have amaximum height (H), an orthographic projection of the lens body 52 ontothe substrate 2 has a radius (R), an included angle (@) is definedbetween each of the side surface cuts 521 and an imaginary surface 24perpendicular to the upper surface 21 of the substrate 2, and the basemember 51 of the lens structure 5 has a thickness (T).

Referring to FIGS. 1, 13, 14 and 16, influence of a ratio of the maximumheight (H) to the radius (R) of the lens body 52 (hereinafter referredto as H/R ratio) on light extraction efficiency of the LED device 1 willbe described in the following.

In FIG. 16, the horizontal axis denotes the H/R ratio of the lens body52. A larger H/R ratio corresponds to a larger maximum height (H) whenH/R ratio is based on the same value of radius (R). The vertical axisdenotes the light extraction efficiency presented in percentage forcomparison among data points. Referring further to Table 2 below, curvesA1 to A5 in FIG. 16 correspond to LED devices with distinct flip-chipLED die dimensions. Taking curve A2 as an example, the seven points oncurve A2 represent LED devices with identical flip-chip LED diedimensions but distinct H/R ratios. For curve A2, the seven LED devices1 all have the same dimensions of 920 mm×920 mm, but the lens bodies 52thereof respectively have H/R ratios of 0.8, 0.9, 1, 1.1, 1.15, 1.2 and1.3.

TABLE 2 Curve A1 A2 A3 A4 A5 LED die 1143 × 920 × 644 × 504 × 460 ×dimensions 1125 920 644 504 460 (mm × mm)

As shown by curve A2, for example, a smaller H/R ratio corresponds to abetter light extraction efficiency, based on the same flip-chip LED diedimensions. Curves A1, A3, A4 and A5 show substantially the samecharacteristics. Next, comparison among curves A1-A5 will be described.Based on the same H/R ratios (e.g., the H/R ratios all being 0.9),smaller flip-chip LED die dimensions correspond to better lightextraction efficiencies. H/R ratios of 0.8, 1, 1.1, 1.15, 1.2 and 1.3show substantially the same characteristics.

As demonstrated from the trend shown in FIG. 16, an LED device 1 whichincludes flip-chip LED dies 3 with smaller dimensions and/or a lens body52 of smaller H/R ratio has better light extraction efficiency.

Preferably, each of the flip-chip LED dies 3 of the LED device 1 hasdimensions from 460 mm×460 mm to 1143 mm×1125 mm and the lens body 52has an H/R ratio from 0.8 to 1.3. Based on the abovementioned preferableranges, a user may choose the flip-chip LED dies 3 of suitabledimensions and/or the lens body 52 of suitable H/R ratio for achieving adesired light extraction efficiency.

On the other hand, based on the trend shown in FIG. 16, each of curvesA1 to A5 may be substantially represented by a part of a parabola.Generally speaking, a parabola may be represented by a formula of:

y=a _(n)(x−x _(n))² +y _(n),

in which y_(n) represents ordinate of vertex of the n^(th) parabola (‘n’ranging from 1 to 5). In the first embodiment, y₁ to y₅ respectivelyrepresent optimal light extraction efficiencies of curves A1 to A5.x_(n) represents abscissa of vertex of the n^(th) parabola. In the firstembodiment, x₁ to x₅ respectively represent H/R ratios that lead tooptimal light extraction efficiencies of curves A1 to A5. a_(n)represents variation of curvature of the n^(th) parabola. In the firstembodiment, a₁ to a₅ respectively represent the variations of thecurvature of curves A1 to A5 relative to different H/R ratios. A largera_(n) represents a larger variation of light extraction efficiency.

Referring to FIGS. 16 and 17, the abovementioned trends of y_(n), x_(n)and a_(n) of curves A1 to A5 as shown in FIG. 16 can be furtherpresented in FIG. 17.

In FIG. 17, the horizontal axis denotes relative-die-area percentagebased on the flip-chip LED dies 3 having side lengths of 920 mm (i.e.,100%) of curve A2. Therefore, curves A1, A3, A4 and A5 respectively haverelative-die-areas percentages of 151.92%, 49%, 30% and 25%. As for thevertical axes, the left vertical axis denotes light extractionefficiency of the LED device 1 and the right vertical axis denotes acorresponding value of a_(n) and a variation value of X_(n).

For curve B1, the y₁ to y₅ values of curves A1 to A5 can be obtainedtherefrom. For example, the second point from right side of the curve B1corresponds to an abscissa value of 100% (i.e., the flip-chip LED dies 3having side lengths of 920 mm) and a left ordinate value y_(n) (i.e.,maximum light extraction efficiency of curve A2 as shown in FIG. 16) canthus be obtained.

For curve B3, the x₁ to x₅ values of curves A1 to A5 can be obtainedtherefrom. For example, the second point from right side of curve B3corresponds to an abscissa value of 100% (i.e., the flip-chip LED dies 3having side lengths of 920 mm) and a right ordinate value x₂ (i.e.,change in the H/R ratio of curve A2 as shown in FIG. 16) can thus beobtained, which means that curve A2 has a maximum light extractionefficiency when having a H/R ratio of x₂.

For curve B2, the a₁ to a₅ values of curves A1 to A5 can be obtainedtherefrom. For example, the second point from right side of curve B2corresponds to an abscissa value of 100% (i.e., the flip-chip LED dies 3having side lengths of 920 mm) and a right ordinate value a₂ (i.e.,curvature change value a₂ of curve A2 as shown in FIG. 16) can thus beobtained. Based on the trend of curve B2, an absolute value of thecurvature change value a₂ is larger for an LED die with smallerdimensions. Therefore, when the LED device 1 includes the flip-chip LEDdies 3 of smaller dimensions, change in the H/R ratio of the lens body52 would result in a larger change in light extraction efficiency.

Accordingly, based on curves B1 to B3 as shown in FIG. 17, the influenceof structural design of the LED device 1 on light extraction efficiencycan be obtained.

Referring to FIGS. 1, 13, 14 and 18, the influence of the includedangles (θ) between the side surface cuts 521 and the imaginary surfaces24 on the light extraction efficiency of the LED device 1 will bedescribed hereinafter.

In FIG. 18, the horizontal axis denotes the H/R ratio of the lens body52, and the vertical axis denotes the light extraction efficiency of theLED device 1. Each of the three points on line C1 represents the LEDdevice 1 including the flip-chip LED dies 3 of 920 mm side lengths, andthe lens body 52 having an H/R ratio of 1. The three points on line C1respectively correspond to included angles (θ) of 1 degree, 5 degreesand 10 degrees, from top to bottom. As can be seen in FIG. 18, thesmaller the included angle (θ), the better the light extractionefficiency of the LED device 1. Although preferably the included angle(θ) ranges from 0 degrees to 10 degrees, in which the LED device 1 canhave favorable optical properties, the user may choose a desiredincluded angle (θ) based on the abovementioned trends and according toactual needs.

Referring to FIGS. 1, 13, 14 and 19, the influence of the thickness (T)of the base member 51 of the lens structure 5 on the light extractionefficiency and the view angle of the LED device 1 is illustrated.

In FIG. 19, the horizontal axis denotes the thickness (T) of the basemember 51. The left vertical axis denotes the light extractionefficiency of the LED device 1 and the right vertical axis denotes theview angle of the LED device 1. Each of the points on curves D1 and D2represents an LED device 1 including flip-chip LED dies 3 of 920 mm sidelengths.

Curve D1 shows the influence of the thickness (T) of the base member 51on the light extraction efficiency of the LED device 1. In the firstembodiment, the thickness (T) of the base member 51 preferably rangesfrom 0.1 mm to 0.7 mm. The smaller the thickness (T) of the base member51, the better the light extraction efficiency of the LED device 1.

Curve D2 shows the influence of the thickness (T) of the base member 51on the view angle of the LED device 1. Based on curve D2, the smallerthe thickness (T) of the base member 51, the larger the view angle ofthe LED device 1.

Therefore, based on the trends shown in FIG. 19, the user can choose asuitable thickness (T) of the base member 51 according to the requiredlight extraction efficiency and the view angle of the LED device 1.

FIG. 15 shows a second variation of the first implementation of thefirst embodiment of the LED device 1 (see FIG. 1). The LED device 1further includes two identification mark components 6 that are disposedon the substrate 2 (see FIG. 1), that are covered by the base member 51,and that respectively correspond in position to regions of the basemember 51 not covered by the lens body 52. It is worth noticing that theidentification mark components 6 are not covered by the phosphormaterial 53 (see FIG. 3) and an orthographic projection of the lens body52 onto the substrate 2 is not interfered by the identification markscomponents 6. Accordingly, the identification mark components 6 enableidentification of positions and directions of internal components of theLED device 1 by the user or manufacturing facilities, withoutinterfering with the lens body 52, and therefore the manufacturingprocess is expedited. In other variations, the number of theidentification mark component(s) 6 may be adjusted to one or more thantwo, while still being capable of facilitating the manufacturing process(for example, enabling leveling calibration).

FIG. 20 shows a third variation of the first implementation of the firstembodiment of the LED device 1. Besides being configured in a dome shapeformed with the side surface cuts 521, the lens body 52 may beconfigured in a cubic shape having optical properties different fromthose of the dome shape. The insulation layer 71 and the reflectionlayer 72 (see FIG. 1) are omitted in the third variation of the firstimplementation of the first embodiment. However, it should be noted thatthe use of the insulation layer 71 and the reflection layer 72 may bechanged according to actual needs and should not be limited by thedisclosure of FIG. 20.

Second Embodiment

FIGS. 21 to 23 show a second embodiment of the LED device 1 according tothe present disclosure. The second embodiment of the LED device 1 has astructure similar to that of the first embodiment. The differencesbetween these two embodiments reside in the numbers and arrangements ofthe flip-chip LED dies 3, the upper bonding pads 411, the lower bondingpads 42 and the interconnectors 43.

To be more specific, the relative numbers of the components are based onthe number of the flip-chip LED dies 3, which are bounded by thefollowing rules.

When the number of the flip-chip LED dies 3 is N, the number of theupper bonding pad assemblies 41 is N, the number of the upper bondingpads 411 is 2N, the number of the lower bonding pads 42 is N+1, and thenumber of the interconnectors 43 is 2N.

In the second embodiment, the number of the flip-chip LED dies 3 isthree (i.e., including the flip-chip LED dies 3 a, 3 b, 3 c as shown inFIG. 22). Therefore, the number of the upper bonding pad assemblies 41is three, the number of the upper bonding pads 411 is six, the number ofthe lower bonding pads 42 is four, and the number of the interconnectors43 is six.

Different from the first implementation of the first embodiment as shownin FIGS. 5 and 6, in the second embodiment, the lower bonding pads 42include two first lower bonding pads 42 a and two second lower bondingpads 42 b. The interconnectors 43 include four first interconnectors 43a and two second interconnectors 43 b. Each of the first lower bondingpads 42 a is connected to bottom portions of corresponding two of thefirst interconnectors 43 a. As a result, the flip-chip LED dies 3 a, 3b, 3 c are electrically connected in series. The second lower bondingpads 42 b are respectively connected to bottom portions of the secondinterconnectors 43 b so as to serve as two connection points forelectrically connecting the flip-chip LED dies 3 a, 3 b, 3 c to externalelectrical circuits. Specifically, an upper left one of the upperbonding pads 411 of FIG. 22 is electrically connected to a bottom one ofthe second lower bonding pads 42 b of FIG. 23 via one of the secondinterconnectors 43 b. An upper right one of the upper bonding pads 411of FIG. 22 is electrically connected to a bottom one of the first lowerbonding pads 42 a of FIG. 23 via one of the first interconnectors 43 a.A center left one of the upper bonding pads 411 of FIG. 22 iselectrically connected to the bottom one of the first lower bonding pads42 a of FIG. 23 via another one of the first interconnectors 43 a. Acenter right one of the upper bonding pads 411 of FIG. 22 iselectrically connected to a top one of the first lower bonding pads 42 aof FIG. 23 via yet another one of the first interconnectors 43 a. Alower left one of the upper bonding pads 411 of FIG. 22 is electricallyconnected to the top one of the first lower bonding pads 42 a of FIG. 23via still another one of the first interconnectors 43 a. A lower rightone of the upper bonding pads 411 of FIG. 22 is electrically connectedto a top one of the second lower bonding pads 42 b of FIG. 23 via theother one of the second interconnectors 43 b.

Therefore, as described above, the numbers of the upper bonding pads411, the lower bonding pads 42 and the interconnectors 43 can bedetermined based on the number of the flip-chip LED dies 3. Thisfacilitates structural design of the LED device 1 and enables effectiveutilization of the substrate 2 of limited area to achieveminiaturization of the LED device 1.

Besides using two or three flip-chip LED dies 3, four flip-chip LED dies3 may also be implanted in the LED device 1. Arrangements of theelectrical conductive structure 4, the lens structure 5, the insulationlayer 71 and the reflection layer 72 may be changed based on actualneeds and should not be limited by the first implementation of the firstembodiment and the second embodiment.

As shown in FIG. 21, the insulation layer 71 of the LED device 1 isformed with six openings that are spaced apart from one another and thatrespectively have spaces the same as those of the upper bonding pads 411such that insulation layer 71 is flush with the upper bonding pads 411for electrical insulation. The relation between the insulation layer 71and the upper bonding pads 411 is similar to that of the firstembodiment and therefore will not be further described for the sake ofbrevity. However, the insulation layer 71 may be omitted in otherembodiments and should not be limited by the description disclosedherein.

As shown in FIG. 24, the reflection layer 72 is provided on at least oneof the insulation layer 71 and the upper bonding pads 411 and is formedwith at least one opening for receiving the three flip-chip LED dies 3.It is worth noting that the reflection layer 72 may be formed with threeopenings for respectively receiving the three flip-chip LED dies 3.However, the reflection layer 72 may be omitted in other embodiments andshould not be limited by the description disclosed herein. Thereflection layer 72 is capable of alleviating light absorption caused bythe substrate 2 or the insulation layer 71, and brightness of the lightemitted by the LED device 1 is therefore increased.

Third Embodiment

FIGS. 25 and 26 show a third embodiment of the LED device 1 according tothe present disclosure. The third embodiment of the LED device 1includes a substrate 2, a flip-chip LED die 3, an electrical conductivestructure 4, a lens structure 5 and an insulation layer 71.

The third embodiment of the LED device 1 has a structure similar to thatof the first embodiment. The differences between the first and thirdembodiments reside in a number of the flip-chip LED die(s) 3 and thestructure of the conductive structure 4.

The first embodiment of the LED device 1 includes a plurality of theflip-chip LED dies 3. However, in the third embodiment, the LED device 1includes only one flip-chip LED die 3. For example, in a firstimplementation of the third embodiment, the substrate 2 has dimensionsof 1600 mm×1600 mm and the flip-chip LED die 3 has dimensions of 533mm×1092 mm. A ratio of the surface area of the flip-chip LED die 3 tothat of the substrate 2 is 22.7%. In a second implementation of thethird embodiment, the substrate 2 has dimensions of 1600 mm×1600 mm andthe flip-chip LED die 3 has dimensions of 1397 mm×1397 mm. A ratio ofthe surface area of the flip-chip LED die 3 to that of the substrate 2is 76.2%. Under the same dimensions of the substrate 2, the flip-chipLED die 3 may have dimensions between 533 mm×1092 mm and 1600 mm×1600mm. Therefore, the ratio of the surface area of the flip-chip LED die 3to that of the substrate 2 ranges from 22.7% to 76.2%. However,dimensions of the flip-chip LED die 3 and the substrate 2, and relativearea between the flip-chip LED die 3 and the substrate 2 may be changedand should not be limited by the implementations disclosed above.

The conductive structure 4 has a structure similar to that of the firstimplementation of the first embodiment, with the differences residing inthat, in the third embodiment, the conductive structure 4 includes twolower bonding pads 42. The lower bonding pads 42 are respectivelyconnected to the upper bonding pads 411 via two interconnectors 43. Oneof the upper bonding pads 411 and one of the lower bonding pads 42 areeach formed with a notch. The upper surface 21 and the lower surface 22of the substrate 2 are each formed with an identification mark (notshown) that enables identification of positions and directions ofinternal components of the LED device 1 by the user or manufacturingfacilities.

The insulation layer 71 is formed with two openings 711, each of whichhas a shape and an area corresponding to those of a respective one ofthe upper bonding pads 411 such that the respective upper bonding pad411 is capable of being disposed in the opening 711. That is, the upperbonding pads 411 define a first pattern and the insulation layer 71defines a second pattern that is complementary to the first pattern,such that the upper bonding pads 411 are flush with the insulation layer71. When the positive electrode 31 and the negative electrode 32 of theflip-chip LED die 3 are respectively connected to the upper bonding pads411, the insulation layer 71 is capable of effectively preventing shortcircuits from happening. Reliability of the LED device 1 is thereforeimproved.

FIG. 27 shows a variation of the third embodiment of the LED device 1.Besides being configured in a dome shape formed with the side surfacecuts 521 as shown in FIGS. 25 and 26, the lens body 52 may be configuredin a cubic shape as shown in FIG. 27. It should be noted that theconfiguration of the lens body 52 should not be limited to theabovementioned disclosure.

Fourth Embodiment

FIGS. 28 and 29 show a fourth embodiment of the LED device 1 accordingto the present disclosure. The fourth embodiment of the LED device 1includes a substrate 2, a flip-chip LED die 3, an electrical conductivestructure 4, a lens structure 5, an insulation layer 71 and a reflectionlayer 72.

The fourth embodiment of the LED device 1 has a structure similar tothat of the third embodiment with the differences residing in that thefourth embodiment of the LED device 1 further includes the reflectionlayer 72. The reflection layer 72 may be configured in a square shapeand is formed with an opening for receiving the flip-chip LED die 3. Inother words, the reflection layer 72 is disposed on the insulation layer71 and surrounds the flip-chip LED die 3. The reflection layer 72 ismade of an insulation material, such as ceramic ink, that has highreflectivity. When the reflection layer 72 and the insulation layer 71are made of the same material, the reflection layer 72 and theinsulation layer 71 may be simultaneously formed on the substrate 2. Byproviding the reflection layer 72 on the substrate 2 and the insulationlayer 71, light absorption attributed to the substrate 2 and theinsulation layer 71 can be alleviated and overall brightness of thelight emitted by the LED device 1 is therefore improved.

Referring to FIG. 30, besides being configured in a dome shape formedwith the side surface cuts 521 as shown in FIGS. 28 and 29, the lensbody 52 may be configured in a cubic shape as shown in FIG. 30. Itshould be noted that the configuration of the lens body 52 should not belimited to the abovementioned disclosure.

Moreover, the various identification mark components 6 (see FIG. 15) asdescribed above may be used in the fourth embodiment of the LED device1.

Based on the disclosure above, with the provision of the substrate 2, atleast one flip-chip LED die 3, the electrical conductive structure 4,the lens structure 5, the insulation layer 71 and the reflection layer72, the LED device 1 of the present disclosure can achieve the followingeffects:

(1) by choosing the material used for making the substrate 2, lightbrightness and heat dissipation of the LED device 1 can be improved;

(2) by forming the groove 212 in the upper surface 21 of the substrate2, ambient moisture can be prevented from reaching the at least oneflip-chip LED die 3 and reliability of the LED device 1 is thereforeimproved;

(3) by matching the overall surface dimensions of the at least oneflip-chip LED die 3 to dimensions of the upper surface 21 of thesubstrate 2, miniaturization of the LED device 1 can be realized;

(4) by providing the at least one flip-chip LED die 3 having electrodes31, 32 configured in the same direction, manufacturing process of theLED device 1 can be simplified;

(5) by limiting the spacing between adjacent two flip-chip LED dies 3,brightness of the light emitted by the LED device 1 can be assured;

(6) by appropriate selection of the numbers of the flip-chip LED die(s)3, the upper bonding pads 411 of the upper bonding pad assembly(assemblies) 41, the lower bonding pads 42 and the interconnectors 43,the flip-chip LED dies 3 can be electrically connected in series under alimited area of the substrate 2, which facilitates miniaturization ofthe LED device 1;

(7) with the shapes, arrangements and connections of the upper bondingpads 411, the lower bonding pads 42 and the interconnectors 43 sodefined as taught in this disclosure, miniaturization of the LED device1 can be achieved and the process yield is improved;

(8) with the combination of appropriate size of the flip-chip LED die(s)3, thickness (T) of the base member 51 of the lens structure 5, H/Rratio of the lens body 52 and included angles (θ) of the side surfacecuts 521, the LED device 1 can have superior light extraction efficiencyand suitable view angle;

(9) by providing the identification mark components 6, manufacturingprocess of the LED device 1 can be facilitated;

(10) by providing the insulation layer 71, short circuits among upperbonding pad assembly (assemblies) 41 can be prevented and reliability ofthe LED device 1 can be improved; and

(11) by providing the reflection layer 72, brightness of the lightemitted by the LED device 1 is improved.

Therefore, based on the above disclosure, the LED device 1 can certainlyachieve the object of the present disclosure. However, it should beparticularly pointed out that the LED device 1 may not include all ofthe features disclosed in the first to fourth embodiments and may bechanged according to practical needs.

While the disclosure has been described in connection with what areconsidered the exemplary embodiments, it is understood that thisdisclosure is not limited to the disclosed embodiments but is intendedto cover various arrangements included within the spirit and scope ofthe broadest interpretation so as to encompass all such modificationsand equivalent arrangements.

What is claimed is:
 1. A chip-scale packaged LED device, comprising: asubstrate having an upper surface and a lower surface opposite to saidupper surface, and being formed with a plurality of through holes thatare defined between said upper and lower surfaces and that penetratethrough said substrate; a number (N) of flip-chip LED die (s) disposedon said upper surface of said substrate, each of said flip-chip LEDdie(s) including a positive electrode and a negative electrode, a ratioof an overall surface area of (N) number of said flip-chip LED die(s) toan area of said upper surface of said substrate ranging from 22.7% to76.2%; an electrical conductive structure including a number (N) ofupper bonding pad assembly (assemblies), each of which includes twoupper bonding pads that are spaced apart from each other, said upperbonding pad assembly (assemblies) being disposed on said upper surfaceof said substrate so as to permit said flip-chip LED die(s) to becorrespondingly disposed on said upper bonding pad assembly(assemblies), said two upper bonding pads of each of said upper bondingpad assembly (assemblies) being correspondingly and electricallyconnected to said positive and negative electrodes of a correspondingone of said flip-chip LED die(s), a number (N+1) of lower bonding padsspaced apart from one another and disposed on said lower surface of saidsubstrate, and a number (2N) of interconnectors, each of which isdisposed in a corresponding one of said through holes and interconnectscorresponding ones of said upper and lower bonding pads; and a lensstructure disposed on said upper surface of said substrate and coveringsaid flip-chip LED die(s).
 2. The chip-scale packaged LED deviceaccording to claim 1, wherein the number of said flip-chip LED dies istwo, the number of said upper bonding pads is four, the number of saidinterconnectors is four, and the number of said lower bonding pads isthree, said flip-chip LED dies including a first flip-chip LED die and asecond flip-chip LED die, said interconnectors including two firstinterconnectors and two second interconnectors, said lower bonding padsincluding a first lower bonding pad and two second lower bonding pads,each of said first and second interconnectors having a top portion thatis connected to a corresponding one of said upper bonding pads, said topportions of said two first interconnectors being electrically andrespectively connected to said positive electrode of said firstflip-chip LED die and said negative electrode of said second flip-chipLED die, each of said two first interconnectors having a bottom portionthat is connected to said first lower bonding pad, each of said twosecond interconnectors having a bottom portion that is connected to acorresponding one of said two second lower bonding pads.
 3. Thechip-scale packaged LED device according to claim 2, wherein saidsubstrate is configured into a square board, each of said upper bondingpads being configured into a rectangular layer, said upper bonding padsbeing arranged in a matrix, each of said first lower bonding pad andsaid two second lower bonding pads being configured into a rectangularlayer, said first lower bonding pad and said two second lower bondingpads being arranged in a row.
 4. The chip-scale packaged LED deviceaccording to claim 2, wherein said substrate is configured into a squareboard, each of said upper bonding pads being configured into arectangular layer, said upper bonding pads being arranged in a matrix,said first lower bonding pad being configured into a substantiallyrectangular layer formed with two cutout corners that are arrangeddiagonally, each of said two second lower bonding pads being configuredinto a rectangular layer disposed in a corresponding one of said cutoutcorners of said first lower bonding pad.
 5. The chip-scale packaged LEDdevice according to claim 2, wherein said substrate is configured into asquare board, each of said upper bonding pads being configured into arectangular layer, said upper bonding pads being arranged in a matrix,said first lower bonding pad being configured into a rectangular layer,each of said two second lower bonding pads being configured into anL-shaped layer, said two second lower bonding pads cooperating with eachother to surround said first lower bonding pad.
 6. The chip-scalepackaged LED device according to claim 2, wherein said substrate isconfigured into a square layer, each of said upper bonding pads beingconfigured into a rectangular layer, said upper bonding pads beingarranged in a matrix, said first lower bonding pad being configured intoan L-shaped layer, each of said two second lower bonding pads beingconfigured into a rectangular layer, said second lower bonding padsbeing arranged in a row and partially surrounded by said first lowerbonding pad.
 7. The chip-scale packaged LED device according to claim 1,wherein said lens structure includes a base member disposed on saidupper surface of said substrate, and a lens body disposed on said basemember, said lens body being configured in a dome shape formed with aplurality of side surface cuts, said lens structure further including aphosphor material that covers said flip-chip LED die(s) and that issurrounded by said base member of said lens structure.
 8. The chip-scalepackaged LED device according to claim 1, wherein said lens structureincludes a base member disposed on said upper surface of said substrate,and a lens body disposed on said base member, said lens body beingconfigured in a dome shape formed with a plurality of side surface cuts,said LED device further comprising at least one identification markcomponent disposed on said substrate, said base member of said lensstructure covering said identification mark component, an orthographicprojection of said lens body onto said substrate being not interfered bysaid at least one identification mark component.
 9. The chip-scalepackaged LED device according to claim 1, wherein said lens structureincludes a base member disposed on said upper surface of said substrate,and a lens body disposed on said base member, said lens body beingconfigured in a dome shape formed with a plurality of side surface cuts,an included angle defined between each of said side surface cuts and animaginary surface perpendicular to said upper surface of said substrateranging from 0 degree to 10 degrees.
 10. The chip-scale packaged LEDdevice according to claim 1, wherein said lens structure includes a basemember disposed on said upper surface of said substrate, and a lens bodydisposed on said base member, said lens body being configured in a domeshape formed with a plurality of side surface cuts, said lens bodyhaving a maximum height (H), an orthographic projection of said lensbody onto said substrate having a radius (R), a ratio of said maximumheight (H) to said radius (R) ranging from 0.8 to 1.3.
 11. Thechip-scale packaged LED device according to claim 1, wherein said lensstructure includes a base member disposed on said upper surface of saidsubstrate, and a lens body disposed on said base member, said lens bodybeing configured in a dome shape formed with a plurality of side surfacecuts, said base member of said lens structure having a thickness rangingfrom 0.1 mm to 0.7 mm.
 12. The chip-scale packaged LED device accordingto claim 1, further comprising an insulation layer that is disposed onsaid upper surface of said substrate and disposed between said upperbonding pads to be flush with said upper bonding pads.
 13. Thechip-scale packaged LED device according to claim 12, further comprisinga reflection layer that is provided on at least one of said insulationlayer and said upper bonding pads, said reflection layer being formedwith at least one opening for receiving said flip-chip LED die(s). 14.The chip-scale packaged LED device according to claim 1, wherein thenumber of said flip-chip LED dies is greater than two, and a spacingbetween adjacent two of said flip-chip LED dies is not less than 0.19mm.
 15. A chip-scale packaged LED device, comprising: a substrate havingan upper surface and a lower surface opposite to said upper surface, andbeing formed with a plurality of through holes that are defined betweensaid upper and lower surfaces and that penetrate through said substrate;an electrical conductive structure including two upper bonding pads thatdefine a first pattern and that are spaced apart from each other anddisposed on said upper surface of said substrate, two lower bonding padsthat are spaced apart from each other and that are disposed on saidlower surface of said substrate, and two interconnectors, each of whichis disposed in a corresponding one of said through holes andinterconnects said upper and lower bonding pads; an insulation layerthat defines a second pattern complementary to said first pattern andthat is disposed on said upper surface of said substrate, said two upperbonding pads being flush with said insulation layer; a flip-chip LED diebeing disposed on said upper surface of said substrate and beingelectrically connected to said upper bonding pads, a ratio of a surfacearea of said flip-chip LED die to an area of said upper surface of saidsubstrate ranging from 22.7% to 76.2%; and a lens structure disposed onsaid upper surface of said substrate and covering said flip-chip LEDdie.
 16. The chip-scale packaged LED device according to claim 15,wherein said lens structure includes a base member disposed on saidupper surface of said substrate, and a lens body disposed on said basemember, said lens body being configured in a dome shape formed with aplurality of side surface cuts, said LED device further comprising atleast one identification mark component disposed on said substrate, saidbase member of said lens structure covering said identification markcomponent, an orthographic projection of said lens body onto saidsubstrate being not interfered by said at least one identification markcomponent.
 17. The chip-scale packaged LED device according to claim 15,wherein said lens structure includes a base member disposed on saidupper surface of said substrate, and a lens body disposed on said basemember, said lens body being configured in a dome shape formed with aplurality of side surface cuts, an included angle defined between eachof said side surface cuts and an imaginary surface perpendicular to saidupper surface of said substrate ranging from 0 degree to 10 degrees. 18.The chip-scale packaged LED device according to claim 15, wherein saidlens structure includes a base member disposed on said upper surface ofsaid substrate, and a lens body disposed on said base member, said lensbody being configured in a dome shape formed with a plurality of sidesurface cuts, said lens body having a maximum height (H), anorthographic projection of said lens body onto said substrate having aradius (R), a ratio of said maximum height (H) to said radius (R)ranging from 0.8 to 1.3.
 19. The chip-scale packaged LED deviceaccording to claim 15, wherein said lens structure includes a basemember disposed on said upper surface of said substrate, and a lens bodydisposed on said base member, said lens body being configured in a domeshape formed with a plurality of side surface cuts, said base member ofsaid lens structure having a thickness ranging from 0.1 mm to 0.7 mm.20. The chip-scale packaged LED device according to claim 15, furthercomprising a reflection layer that is provided on at least one of saidinsulation layer and said upper bonding pads, said reflection layerbeing formed with at least one opening for receiving said flip-chip LEDdie.